FPGA Developer (SY-RF-LL-2026-129-GRAP)

Develop FPGA firmware implementing precise real-time phase, amplitude, and resonance tuning algorithms. Design and integrate firmware components and fast diagnostic sub-systems. Develop Python-based tools and frameworks for automated hardware testing, parameter characterisation, and laboratory data analysis. Support the integration, laboratory validation, and commissioning of the new low-level cavity controllers directly.

At CERN, the European Organization for Nuclear Research, we are pushing the frontiers of science and technology. Our groundbreaking work brings together not only physicists but also a diverse range of professionals from engineering, technical, scientific, and administrative fields. Together, we foster an environment where innovation and collaboration thrive. Every day, we face exciting new challenges and opportunities to contribute to cutting-edge research that shapes our understanding of the universe. We meet these challenges through the diverse perspectives within our teams, ensuring every contribution is valued and driving our shared sense of inclusion and purpose. Diversity is a core value of CERN since its foundation, and it remains central to our mission and continued success. If you are ready to be part of a dynamic, inclusive community pushing the boundaries of knowledge, CERN is the place where your curiosity and skills can thrive. Be part of our mission to uncover what lies at the heart of the universe!

• Experience in FPGA design and firmware development, preferably using VHDL.

• Familiarity with FPGA development environments and verification/debugging tools.

• Programming experience in Python or a similar language for test automation and data analysis.

• Experience modeling or simulating digital signal processing (DSP) algorithms or control loops.

• Exposure to Radio Frequency (RF) concepts, basic control theory (like PID loops), or electronics hardware debugging.

• Familiarity with hardware testing and developing automated test benches for hardware validation.

• Proficiency in digital design and FPGA development, ideally utilising VHDL or Verilog.

• Solid programming skills in Python.

• Ability to troubleshoot and validate mixed-signal hardware systems.

• Spoken and written English, with a commitment to learn French.

• Knowledge of digital signal processing techniques, such as digital filtering, mixing, or I/Q modulation/demodulation.

• Understanding of basic feedback control systems and control theory.

• Familiarity with version control workflows using Git and continuous integration (CI).

• You are a national of a CERN Member or Associate Member State.

• You have a professional background in Electronics Engineering (or a related field) and have either: a Master's degree with 2 to 6 years of post-graduation professional experience; or a PhD with no more than 3 years of post-graduation professional experience.

• You have never had a CERN fellow or graduate contract before.